Tenstorrent Ascalon-S uarch-tool benchmarks

VLEN: 256

Detect all1s tail/mask policy with simple code snippet:
Tail agnostic policy: all1s
Mask agnostic policy: all1s
Is vl always set to min(AVL,VLMAX): yes
    Note: spec allows ceil(AVL/2)<=vl<=VLMAX for VLMAX<AVL<2*VLMAX

Measures how LMUL scheduling impacts when results are ready:
A) LMUL=8 v0 overlap with LMUL=1 v0:     161.0055236 cycles/iter
B) LMUL=8 v0 overlap with LMUL=1 v3:     161.0059814 cycles/iter
C) LMUL=8 v0 overlap with LMUL=1 v7:     232.0054626 cycles/iter
D) LMUL=8 v0 overlap with LMUL=1 v8:     161.0035400 cycles/iter
E) LMUL=8 v0 overlap with LMUL=1 v0..v8: 232.0050048 cycles/iter

Measures overhead of reinterpreting a mask as a vector:
A) reinterpret:       13.0040588 cycles/iter
B) don't reinterpret: 13.0039062 cycles/iter